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Date Posted: 6/22/2008 9:32:19 PM  Status: Closed
Asyncronous Digital Circuits Question
Course Textbook Chapter Problem
Digital Circuits Digital Logic Circuit Analysis & Design 10 8
Question Details:
Determine a primitive flow table for a fundamenta-mode circuit that has following requirements:
 
1 input x
1 output z
 
THe output should follow the input on every other 0 - 1 - 0 transition as indicated by the figure below.
 
 
 Thanks for your help
  Will Rate!
 
Hope this helps........
Please Rate.........

Answers:

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Date Posted: 6/25/2008 2:13:41 AM  Status: Live
Asker's Rating: Lifesaver   
Response:
We have to disign a logical circuit in which the output
Input-Output table
X Z
0 0
1 0
0 0
1 1
0 0
1 0
0 0
1 1
0 0
' '
' '
' '
' '
' '
 
It is a sequence detector, when ever a sequence of 010 is detected then next output is same as input.
Later output will be zero until next seuence will arrival.
 
In this a three bit shift register, NAND gate and tri-state buffer is used.
For every clock pulse one bit is shifted to the right.
When ever a sequence of 010 will come output of NAND gate is logic '0', which will enable the tri-state buffer and output Z = X at that instant.
That is when sequence 010 is detected output follows the input. Otherwise output = 0.
 
I hope this helps you...........
LambdaChiJP's Comment:
Thank you



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