Plz Help in Digital Logic Design

Question # 1

Implement the following function with a 4-to-1-line multiplexer ? Draw the truth table and the corresponding block diagram for the MUX ?

                                    F(x, y, z) = ?(1, 2, 6, 7)  

Solution

F(x, y, z) = ?(1, 2, 6, 7)  

Truth table for three variables is as under

Now the output function “Y” becomes in accordance with the given function terms 

      Y= A’₂ A’₁ A₀ + A’₂ A₁ A’₀ + A₂ A₁ A’₀ + A₂ A₁ A₀

As the function output “Y” so we need three FOUR, three input AND gate, and one FOUR input OR date, and THREE inverters.